Digital System Design (CSSE7410)
Information valid for Semester 2, 2019
Course level
Postgraduate Coursework
Faculty
Engineering, Architecture & Information Technology
School
Info Tech & Elec Engineering
Units
2
Duration
One Semester
Delivery mode
Internal
Class hours
2 Lecture hours
3 Practical or Laboratory hours
Incompatible
CSSE2000, CSSE3000, CSSE4010, CSSE7011
Prerequisite
CSSE7301
Assessment methods
Mid-semester exam, practicals, project, final exam
Course enquiries
Study Abroad
This course is pre-approved for Study Abroad and Exchange students.
Course description
[First offered 2013] The objective of this course is to give the students the theoretical basis & practical skills in modern design of medium size digital systems in various technologies, with a focus on Field Programmable Gate Arrays (FPGAs). The design methodology, systematically introduced & used in the course, is based on simulation & synthesis with hardware description language (VHDL) tools. Topics covered in this course include: conceptual design step from requirements & specification to simulation & synthesis model in VHDL, design of complex controllers with Finite State Machines, design of sequential blocks with Controller-Datapath methodology, issues in design for testability, electrical & timing issues in logic and system design, overview of implementation technologies with emphasis on advances in FPGAs.
Archived offerings
Course offerings | Location | Mode | Course Profile |
Semester 2, 2019 (22/07/2019 - 16/11/2019) | St Lucia | Internal | Course Profile |
Semester 2, 2018 (23/07/2018 - 17/11/2018) | St Lucia | Internal | Course Profile |
Semester 2, 2017 (24/07/2017 - 18/11/2017) | St Lucia | Internal | Course Profile |
Semester 2, 2016 (25/07/2016 - 19/11/2016) | St Lucia | Internal | Course Profile |